CPO on the Rise: ASE’s Role in the Next Heterogeneous Revolution
Original Articles By SemiVision Research (IEEE ECTC , ASE )
As AI computing scales beyond imagination, traditional electrical interconnects are approaching their physical limits. In this data-driven technological revolution, photonic packaging is no longer a vision of the future—it is the solution of today.
From chip to system, ASE is redefining the value chain of heterogeneous integration and advanced packaging, with Silicon Photonics (SiPh) and Co-Packaged Optics (CPO) at its core.
This is not merely a technological evolution—it is the beginning of a new era of supply chain transformation and system-level innovation.
Hi to HI: ASE’s Vision for Enriching Heterogeneous Integration with Photonics
In the rapidly evolving landscape of advanced packaging, ASE has firmly positioned itself at the forefront of innovation through its comprehensive heterogeneous integration (HI) strategy. From chiplet-based architectures to advanced fan-out and 2.5D/3D integration, ASE continues to redefine the boundaries of what is possible in semiconductor packaging. As we move from the simple greeting of “Hi” to the sophisticated world of “HI”—Heterogeneous Integration—we embrace a future where diverse components, materials, and functionalities are seamlessly brought together to deliver unprecedented performance and system-level efficiency.
Central to ASE’s next chapter of innovation is photonic integration. As AI workloads, data centers, and high-performance computing demand ever-increasing bandwidth and lower latency, the limitations of traditional electrical interconnects become apparent. ASE recognizes that photonics is not just a complementary technology, but a critical enabler of next-generation HI systems. With investments in silicon photonics packaging, optical engine co-packaging, and wafer-level photonic assembly technologies, ASE is laying the groundwork for an era where light—not just copper—drives performance.
By enriching HI with photonics, ASE aims to bridge the gap between compute and communication, delivering packaging platforms that are not only denser and more efficient, but also ready for the optical future of AI and HPC. In this journey from “Hi” to “HI,” photonics is the new language of speed, scale, and system innovation.
ASE Takes the Lead: Integrating Photonics into HPC and Network Systems
On May 27, 2025, ASE Group’s Vice President of Corporate R&D, Dr. CP Hung, delivered a keynote at the HIR (Heterogeneous Integration Roadmap) Panel, focusing on the critical topic of “Integrating Photonics in HPC and Network Systems.” As an IEEE Fellow and long-time thought leader in advanced packaging, Dr. Hung’s message was clear: the future of high-performance computing (HPC) and data-centric infrastructure hinges on the seamless fusion of electronics and photonics.
ASE, a global leader in semiconductor packaging, is actively steering the industry into a new era of heterogeneous integration (HI)—a paradigm where logic, memory, RF, and now photonics, converge within advanced packaging ecosystems. In this transformation, photonic integration is no longer a niche or experimental field—it is becoming a foundational technology for achieving the ultra-high bandwidth, low latency, and energy efficiency required by next-generation AI and HPC workloads.
Under Dr. Hung’s leadership, ASE has been expanding its research and development footprint in silicon photonics packaging, optical co-packaged modules, and high-density optoelectronic interposers. These efforts are aligned with global HIR initiatives and respond to the scaling limitations of traditional electrical interconnects. The incorporation of optical I/O directly into package-level design is a natural evolution, especially as data center architectures pivot towards disaggregated, photonic-enabled infrastructures.
Having chaired the SEMICON Taiwan PKG & TEST Committee since 2013 and co-chaired since 2021, Dr. Hung has been instrumental in aligning ASE’s roadmap with international packaging trends. His panel discussion reflects ASE’s strategic commitment to not only keep pace with the industry’s demands—but to shape them through innovation and collaborative leadership.
As the semiconductor industry embraces the shift from copper to light, ASE is poised to be a key enabler, turning the promise of photonics into scalable, manufacturable, and high-performance solutions. The journey from HI to truly hybrid optoelectronic systems has begun—and ASE is lighting the way.
As AI computing surges beyond the limitations of traditional electronic packaging, ASE has launched a sweeping transformation—not only in technology but in how chips, packages, and systems are co-designed and manufactured. At the heart of this transformation lies VIPack™, ASE’s next-generation platform for vertically integrated advanced packaging. More than a stack of technologies, it represents a new architectural foundation—one that is photonic-ready, chiplet-friendly, and built for the data-driven future.
ASE’s Strategy in Advanced Packaging: Powered by VIPack™
1. VIPack™ – A Unified Heterogeneous Integration Platform
Introduced in 2022, VIPack™ is ASE’s flagship platform designed to support the full spectrum of advanced packaging technologies, including:
2.5D and 3D IC integration using TSV,
Fan-out architectures such as FOPoP, FOCoS, FOCoS‑Bridge, and FOSiP,
Optical integration technologies compatible with Co-Packaged Optics (CPO),
Micro-bump pitch scaling down to 20μm for ultra-dense interconnects.
2. Purpose-Built for AI and Chiplet Era
VIPack™ is purpose-built to meet the performance, bandwidth, and thermal requirements of next-gen applications, including AI/ML, HPC, 5G, autonomous vehicles, and satellite communications. With its Integrated Design Ecosystem™ (IDE), ASE also offers an optimized design workflow that reduces time-to-market and improves design efficiency by up to 50%.
3. Enabling Co-Packaged Optics (CPO)
ASE has positioned VIPack™ as a foundation for optical-electrical convergence, enabling the integration of Silicon Photonics (SiPh), optical engines, and EIC/PIC components within a single package. The platform supports fine-pitch RDLs, dual-sided routing, and fiber attach solutions for high-bandwidth, low-power CPO applications.
4. Market Momentum and Outlook
With explosive growth in AI infrastructure driving demand, ASE forecasts that revenue from advanced packaging and test will grow from USD $600 million in 2024 to over $1.6 billion in 2025—with more than 75% of that coming from cutting-edge packaging technologies. ASE’s strategic investment in VIPack™ signals its commitment to remaining at the forefront of this transition.
ASE is not just responding to the rise of AI—it is building the physical foundation for its future. Through VIPack™, the company connects chip, package, and system into one tightly integrated optical-electrical platform, enabling the performance leap demanded by next-gen data workloads.
For Paid Members ,SemiVision will discuss topics on
From High Density to Photonic: ASE’s Evolutionary Path for AI-Centric Advanced Packaging
SiPh Integration Shift: From Pluggable to Co-Packaged Optics
Enabling Co-Packaged Optics: ASE’s Advanced Packaging with Silicon Photonic
Detachable Fiber & EIC/PIC Testing: Opportunities and Challenges in Co-Packaged Optics
SiPh and CPO as the “New Link” in the Semiconductor Value Chain