Introduction of TSMC CoWoS-R Packaging
CoWoS® Platform for AI HPC Packaging
At the 2024 Taiwan Semicon Forum, senior executives from TSMC frequently discussed advanced packaging, with a focus on two key technologies: CoWoS and SoIC.
To start, CoWoS package involves a "horizontal placement" approach, while SoIC focuses on "vertical stacking." Advanced packaging can first employ CoWoS for horizontal placement and then use SoIC for vertical stacking.
We know that CoWoS can be divided into three types: CoWoS-R, CoWoS-S, and CoWoS-L. Among them, CoWoS-R is relatively simpler because it mainly involves stacking layers of PI (polyimide) material, which we refer to as RDL (Redistribution Layers). This method is typically used for designs with relatively small chip areas. However, because the CoWoS-R interposer is made of PI, it is sensitive to heat, as chips emit heat during operation, and the interposer's sensitivity to temperature becomes a relevant factor.
Structure of TSMC CoWoS-R
The RDL interposer consists of up to 6L Cu layers for routing with min. of 4um pitch(2um line width/spacing).
The RDL interconnect offers good signal and power integrity performance with lower RC value of the routing line to achieve a high transmission data rate.
RDL layer and C4/UF layers provide good buffer effect due to the CTE mismatch between SoC and the corresponding substrate. The strain energy density is greatly reduced in C4 bump.
Material of RDL Interposer:
The organic interposer of the hybrid substrate is fabricated by a fan-out chip-last on a temporary panel with three different kinds of dielectric materials. In TSMC CoWoS-R process, using PSPI for RDL interposer.
Dry-film Photo Imageable Dielectric (PID)
Build-up Film (e.g. ABF)
PSPI (Photosensitive Polyimides) (Main Suppliers: Asahi Kasei、FUJIFILM、HD MicroSystems)
Comparison of RDL Meterials
PSPI RDL Process
PSPI are photosensitive and can be finely patterned on a micrometer scale. They can be coated not only on wafers but also on panels and other substrates.
About SEMI Vision
We are engineers from Taiwan's semiconductor industry with profound expertise in advanced processes and advanced packaging. Our team has in-depth knowledge of AI chips, advanced packaging, CoWoS, SoIC, and Silicon Photonics (PIC).
Additionally, we possess expertise in semiconductor materials, specialty chemicals, and the semiconductor supply chain.
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