TSMC SoW and Tesla Optimus: Revolutionizing AI Integration and Humanoid Robotics
How TSMC's System-on-Wafer (SoW) Technology Powers the Next Generation of AI for Tesla's Optimus Humanoid Robots
Tesla’s humanoid robot "Optimus II" is expected to commence production in 2025, with plans for large-scale mass production in 2026. According to market insiders, Tesla has adopted advanced process technologies from TSMC, one of the world's largest semiconductor foundries, for the robot’s AI system "Dojo," which functions as its "brain." These include the 5-nanometer (nm) process and InFO-SoW (System-on-Wafer) technology, paving the way for a robust production framework.
Although Tesla has established an early-mover advantage in the electric vehicle(EV) sector, the market has become a red ocean of competition. As a new "killer application," Tesla is targeting the humanoid robot market. As part of this initiative, the company plans to produce 1,000 units of Optimus II in 2025, transitioning to a full-scale mass production phase in 2026.
Globally, around 10 types of humanoid robots have already been unveiled in the AI sector. Among these, Nvidia and BMW's "Figure 01" and Tesla's "Optimus II" have garnered significant attention. Optimus II's intelligence infrastructure, the "Dojo" system, utilizes the advanced D1 chip. With TSMC's InFO-SoW technology, Dojo achieves large-scale integration on a wafer, combining vast data processing capabilities with spatial efficiency. This technology enables applications across a broad spectrum, including robotics and autonomous driving systems (FSD: Full Self-Driving).
In the EV domain, Tesla's Autopilot 4.0 hardware for vehicles is produced by South Korea's Samsung. However, the Dojo system, which is required for more advanced AI computing, relies on TSMC. The Dojo architecture consists of 25 D1 chips forming a single "Training Tile," with 12 Training Tiles comprising a "Cabinet." Future advancements foresee the integration of HBM (High Bandwidth Memory) with CoWoS-SoW technology, projected to enter mass production around 2027, potentially increasing computing power by over 40 times compared to current systems
The first SoW product currently utilizes integrated fan-out (InFO) technology focused on logic chips. Another chip stacking version using CoWoS_SoW is expected to enter mass production in 2027, although it is not yet clear whether it will adopt CoWoS-R, CoWoS-L, or CoWoS-S technology. It is reported that the logic chips and HBM memory for CoWoS_SoW will undergo pre-testing and will be connected to the silicon substrate via high-density interconnects and through-silicon vias (TSVs).
From TSMC's slide, it appears there are two potential technological options. One is the CoWoS (SoIC) advanced packaging (shown as the second image from the left), which is set to launch in 2026. This approach plans to utilize a reticle size 5.5 times larger, enabling the integration of 12 HBM memory stacks and accommodating larger substrates with dimensions up to 100×100mm. The packaged area (indicated in green) is also progressively increasing.
As for the SoW technology (depicted in the circular area at the top), it integrates systems and chips directly on a silicon wafer. The rectangular gray blocks in the illustration represent SoIC chips connected to HBM memory, while the yellow areas indicate I/O regions for signal input and output.
TSMC's SoW technology addresses the limitations of reticle size and yield issues. Starting with pre-tested logic dies, the process focuses on minimizing defects as much as possible. These dies are placed on a carrier wafer, with the gaps between them filled. Next, an additional high-density interconnect layer is constructed using InFO technology to connect the logic chips. The goal is to enhance data bandwidth between the chips, enabling them to function as a large, unified chip.
TSMC Chairman and CEO C.C. Wei, citing conversations with some of the world's wealthiest entrepreneurs, highlighted that while they are heavily invested in multifunctional robot development, their primary concern is the shortage of necessary semiconductor chips. He confidently added, "If they are willing to pay a fair price, chips can always be supplied."
Tesla and TSMC’s collaboration—from EVs to multifunctional robots—marks a critical step in constructing a new "intelligent infrastructure" for the AI era. This partnership heralds a new chapter where AI-driven intelligence is poised to reshape global industry structures and daily life.
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