From Integration to Innovation: A*STAR’s Bold Leap in Heterogeneous Packaging
Original Articles By SemiVision Research (IEEE ECTC , A* STAR)
The global semiconductor industry is undergoing a profound transformation—from the continued pursuit of Moore’s Law to a new era driven by system-level innovation and advanced packaging integration. In this pivotal shift, Heterogeneous Integration (HI) has emerged as a critical enabling technology, powering applications such as Artificial Intelligence (AI), High-Performance Computing (HPC), 5G/6G communications, and low-power edge devices.
In this context, Singapore’s Agency for Science, Technology and Research (A*STAR) is taking an active role in shaping the future of HI. Leveraging its national research infrastructure and advanced manufacturing capabilities, A*STAR is accelerating R&D and the commercialization of heterogeneous integration technologies.
The global semiconductor industry is undergoing a profound transformation—shifting from the relentless scaling of Moore’s Law to a new era driven by system-level innovation and advanced packaging integration. At the heart of this transition lies Heterogeneous Integration (HI), a key enabling technology powering the next generation of applications in Artificial Intelligence (AI), High-Performance Computing (HPC), 5G/6G communications, and energy-efficient edge devices.
Amid this pivotal evolution, Singapore’s Agency for Science, Technology and Research (A*STAR) is taking a proactive role by building national-level research platforms and advanced process capabilities to accelerate the development and deployment of heterogeneous integration technologies.
Why A*STAR and Heterogeneous Integration Deserve Attention
ASTAR is Singapore’s lead government agency for research and innovation. Under its umbrella, the Institute of Microelectronics (IME) has long been a powerhouse in semiconductor process and packaging R&D. In recent years, ASTAR has significantly strengthened its Heterogeneous Integration R&D Line, establishing a vertically integrated platform that spans from individual components and packaging to complete system-level modules. According to recent public updates, the platform includes the following core capabilities:
3D Hybrid Bonding: Enabling high-density, low-latency interconnects between chiplets, supporting vertical stacking of heterogeneous chips such as logic and memory.
Photonics HI & Co-Packaged Optics (CPO): Advancing silicon photonics and co-packaged optics technologies to meet the rising demand for high-speed optical interconnects in data centers and AI systems.
From Components to Systems for AI Hardware: Expanding from chip-level and optoelectronic components to fully integrated AI systems, covering the entire R&D chain from wafer-level prototyping to full-system design enablement.
Why Heterogeneous Integration Is the Future
Heterogeneous Integration is not merely a type of advanced packaging—it represents a holistic engineering challengethat spans materials, processes, design, and system application. As chip scaling reaches physical and economic limits, and power density rises, traditional SoCs (System-on-Chip) struggle to meet the performance and efficiency demands of modern workloads. In contrast, HI offers:
The ability to modularly integrate chips of different process nodes and functions—such as CPUs, GPUs, optical modules, and memory—improving design flexibility and yield.
A natural pathway to enable AI and photonics convergence (e.g., photonic neural networks), delivering higher energy efficiency.
Compact, high-bandwidth, and low-latency computing architectures through innovative packaging, paving the way for transformative advances in AI hardware.
Through collaborative R&D and strategic global partnerships, A*STAR is positioning itself as a central hub for HI innovation in Asia. In today’s rapidly evolving semiconductor landscape, mastering heterogeneous integration is essential to maintaining a competitive edge in next-generation computing. There has never been a better time to re-explore A*STAR’s capabilities and understand the strategic importance of Heterogeneous Integration.
A*STAR: “Fab in a City” — A New Model for Semiconductor Innovation
Unlike traditional semiconductor hubs built in remote industrial parks, A*STAR has adopted a “Fab in a City”strategy—establishing state-of-the-art semiconductor R&D facilities within Singapore’s urban core. These advanced facilities cover a wide spectrum of cutting-edge technologies, including:
Advanced Packaging and Heterogeneous Integration (Adv Pkg / HI)
PiezoMEMS (Piezoelectric Micro-Electro-Mechanical Systems)
Silicon Carbide (SiC) and mmWave Gallium Nitride (GaN)
High-Performance Analog and Digital ICs
Next-Generation Photonics (Advanced Photonics)
This urban innovation model creates seamless connectivity between research and application, accelerating collaboration between academia and industry, and positioning A*STAR as a true system-level innovation hub.
Cross-Disciplinary Teams, Shaping the Future of Semiconductors
ASTAR brings together a diverse, interdisciplinary team of over 500 researchers and engineers dedicated to semiconductor technologies. Through close partnerships with industry and academia, ASTAR has built an end-to-end development pipeline that spans materials, fabrication, design, testing, and system integration.
This R&D ecosystem is particularly well-suited to advance heterogeneous integration, a domain that bridges photonics, MEMS, advanced packaging, and AI hardware—a convergence that defines the next frontier of innovation.
Why Heterogeneous Integration (HI) Deserves Your Attention
HI is increasingly recognized as the key to overcoming the performance bottlenecks of traditional chips. By enabling vertical or lateral integration of dies across different functions, process nodes, and even materials, HI delivers:
Enhanced system performance and energy efficiency
Reduced signal transmission latency and power consumption
Seamless integration of photonic and AI computing modules
Higher packaging density and modular flexibility, supporting compact system designs
As AI models scale exponentially and data centers demand ever-faster interconnects, only heterogeneous integration can support the architectural and packaging innovation required for next-generation AI computing.
With its high-performance urban R&D infrastructure and globally connected innovation network, A*STAR is positioning Southeast Asia at the forefront of this technological revolution.
A*STAR as the Launchpad for the Next Leap
Whether you’re focused on advanced packaging, photonic computing, MEMS platforms, or AI hardware, A*STAR is no longer a passive observer—it is a leader on the global innovation track.
Heterogeneous integration is not just the next chapter in semiconductor development—it is a strategic pillar for Singapore’s future in technology and economic sovereignty. This is a transformation worth watching closely, and A*STAR is already leading the charge.
Advancing to the Next Stage: A*STAR Builds National Co-Innovation Fab to Accelerate Heterogeneous Integration
As the global semiconductor industry undergoes rapid transformation, A*STAR (Agency for Science, Technology and Research, Singapore) is taking a forward-looking approach to enable the next leap in advanced technology. Following its successful “Fab in a City” urban R&D model, A*STAR is now launching the next phase: the construction of a new National Co-Innovation Fab, purpose-built to focus on heterogeneous integration (HI) and advanced packaging.
Strategically located within Singapore’s Tampines Wafer Fab Park, the facility is designed to collaborate closely with industry partners, accelerating the journey from R&D to prototyping and small-volume manufacturing. It will place particular emphasis on:
Advanced Packaging
Photonics Integration
Three Key Features: A Bridge from Lab to Production
1. Industry-Centric Location
Located in the Wafer Fab Park industrial zone, the fab is situated near wafer manufacturing and advanced packaging companies—enabling real-time collaboration and co-innovation with the semiconductor ecosystem.
2. Translational R&D and Pilot Manufacturing
The fab is designed as a translational R&D platform, enabling rapid prototyping and low-volume production. It acts as a critical bridge between research institutions and industry, facilitating fast tech transfer and early product development.
3. Shared Infrastructure with Advanced Capabilities
Equipped with over 130 industry-grade 300mm tools, the facility includes 9,000 square meters of cleanroom space, with 3,000 square meters allocated to sub-fab systems. It supports advanced processing, heterogeneous integration trials, and packaging module simulations under production-relevant conditions.
Building an Open Innovation Ecosystem
A*STAR’s approach to heterogeneous integration is fundamentally collaborative. Rather than operating in silos, the National Co-Innovation Fab is built around an open-ecosystem model, welcoming:
Chip design houses
Advanced packaging service providers
Photonics and optoelectronic component suppliers
New materials and equipment vendors
As A*STAR states:
“Looking forward to expanding our ecosystem of partnerships to accelerate innovations in Heterogeneous Integration!”
This initiative is not just about building a fab—it’s about creating a cross-disciplinary, collaborative platform that spans from devices to complete systems.
How Singapore Is Redefining the Future of Semiconductors through HI
As silicon scaling hits physical limits and demands for AI and high-frequency applications grow more complex, Heterogeneous Integration is no longer a packaging enhancement—it is the new foundation of system design, computing architectures, and communication modules.
Through a dual strategy—combining urban R&D innovation centers with industry-facing pilot manufacturing platforms—A*STAR is systematically building Southeast Asia’s most strategic innovation hub for heterogeneous integration.
The future of semiconductors lies not in “a single chip,” but in modular, photonics-enabled, high-performance systems—and that future has already begun in Singapore.
For Paid Members ,SemiVision will discuss topics on
Accelerating Heterogeneous Integration R&D: A*STAR Builds a Full End-to-End Advanced Packaging Platform
A*STAR: A Model for Heterogeneous Integration Innovation in Asia
Advancing 3D Hybrid Bonding: A*STAR Expands the Depth of Heterogeneous Integration Technologies
Die Stacking Evolution: From 4-Die to 12-Die Hybrid Structures
From Chiplets to Systems: A*STAR’s Comprehensive Heterogeneous Integration Strategy for AI Packaging
A*STAR Brings Photonic Interconnects from Lab to System
From Chiplets to Systems: A*STAR’s Comprehensive Heterogeneous Integration Strategy for AI Packaging
The “One-Stop” HI Challenge: Balancing Power Efficiency and System Complexity
A*STAR’s Full-Stack Solution: Advanced Packaging for Energy-Efficient AI Systems
IME’s Integrated Advanced Packaging Ecosystem
A*STAR IME as a Critical Node for Next-Gen AI System Packaging
Singapore’s Semiconductor Ecosystem Spans the Entire Value Chain: Building Asia’s Most Comprehensive Base for Heterogeneous Integration
Academic and Research Support: The Role of NUS, NTU, SUTD, and A*STAR
A*STAR presented a wide range of technical papers at the 2025 IEEE ECTC, covering the following topics:
